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LOGIC GATES



Logic AND Gate 

A Logic AND Gate is a type of digital logic gate that has an output which is normally at logic level “0” and only goes “HIGH” to a logic level “1” when ALL of its inputs are at logic level “1”

                                                                     


The output state of a “Logic AND Gate” only returns “LOW” again when ANY of its inputs are at a logic level “0”. In other words for a logic AND gate, any LOW input will give a LOW output.
The logic or Boolean expression given for a digital logic AND gate is that for Logical Multiplication which is denoted by a single dot or full stop symbol, ( . ) giving us the Boolean expression of:  A.B = Q.
Then we can define the operation of a 2-input logic AND gate as being:
 
“If both A and B are true, then Q is true”

2-input Transistor AND Gate

A simple 2-input logic AND gate can be constructed using RTL Resistor-transistor switches connected together as shown below with the inputs connected directly to the transistor bases. Both transistors must be saturated “ON” for an output at Q.
2-input transistor and gate
 
Logic AND Gates are available using digital circuits to produce the desired logical function and is given a symbol whose shape represents the logical operation of the ANDgate.

Digital Logic “AND” Gate Types

The 2-input Logic AND Gate

SymbolTruth Table
2-input AND gate
2-input AND Gate
BAQ
000
010
100
111
Boolean Expression Q = A.BRead as A AND B gives Q

The 3-input Logic AND Gate

SymbolTruth Table
3-input digital AND gate
3-input AND Gate
CBAQ
0000
0010
0100
0110
1000
1010
1100
1111
Boolean Expression Q = A.B.CRead as A AND B AND C gives Q
Because the Boolean expression for the logic AND function is defined as (.), which is a binary operation, AND gates can be cascaded together to form any number of individual inputs. However, commercial available AND gate IC’s are only available in standard 2, 3, or 4-input packages. If additional inputs are required, then standard AND gates will need to be cascaded together to obtain the required input value, for example.

Multi-input AND Gate

6-input AND gate
 
The Boolean Expression for this 6-input AND gate will therefore be:
Q = (A.B).(C.D).(E.F)
In other words;
A and B and C and D and E and F gives Q
If the number of inputs required is an odd number of inputs any “unused” inputs can be held HIGH by connecting them directly to the power supply using suitable “Pull-up” resistors.
Commonly available digital logic AND gate IC’s include:
TTL Logic AND Gates
  • 74LS08 Quad 2-input
  • 74LS11 Triple 3-input
  • 74LS21 Dual 4-input
CMOS Logic AND Gates
  • CD4081 Quad 2-input
  • CD4073 Triple 3-input
  • CD4082 Dual 4-input

7408 Quad 2-input AND Gate

7408 logic and gate
In the next tutorial about Digital Logic Gates, we will look at the digital logic OR Gatefunction as used in both TTL and CMOS logic circuits as well as its Boolean Algebra definition and truth tables.


Logic OR Gate 

A Logic OR Gate or Inclusive-OR gate is a type of digital logic gate that has an output which is normally at logic level “0” and only goes “HIGH” to a logic level “1” when one or more of its inputs are at logic level “1”.

                                                                            


The output, Q of a “Logic OR Gate” only returns “LOW” again when ALL of its inputs are at a logic level “0”. In other words for a logic OR gate, any “HIGH” input will give a “HIGH”, logic level “1” output.
The logic or Boolean expression given for a digital logic OR gate is that for Logical Addition which is denoted by a plus sign, ( + ) giving us the Boolean expression of:  A+B = Q.
Then we can define the operation of a 2-input logic OR gate as being:
 
“If either A or B is true, then Q is true”

2-input Transistor OR Gate

A simple 2-input logic OR gate can be constructed using RTL Resistor-transistor switches connected together as shown below with the inputs connected directly to the transistor bases. Either transistor must be saturated “ON” for an output at Q.
2-input transistor or gate
 
Logic OR Gates are available using digital circuits to produce the desired logical function and is given a symbol whose shape represents the logical operation of the OR gate.

Digital Logic “OR” Gate Types

The 2-input Logic OR Gate

SymbolTruth Table
2-input OR gate
2-input OR Gate
BAQ
000
011
101
111
Boolean Expression Q = A+BRead as A OR B gives Q

The 3-input Logic OR Gate

SymbolTruth Table
3-input logic OR gate
3-input OR Gate
CBAQ
0000
0011
0101
0111
1001
1011
1101
1111
Boolean Expression Q = A+B+CRead as A OR B OR C gives Q
Like the AND gate, the OR function can have any number of individual inputs. However, commercial available OR gates are available in 2, 3, or 4 inputs types. Additional inputs will require gates to be cascaded together for example.

Multi-input OR Gate

6-input logic or gate
 
The Boolean Expression for this 6-input OR gate will therefore be:
Q = (A+B)+(C+D)+(E+F)
In other words:
A or B or C or D or E or F gives Q
If the number of inputs required is an odd number of inputs any “unused” inputs can be held LOW by connecting them directly to ground using suitable “Pull-down” resistors.
Commonly available digital logic OR gate IC’s include:
TTL Logic OR Gates
  • 74LS32 Quad 2-input
CMOS Logic OR Gates
  • CD4071 Quad 2-input
  • CD4075 Triple 3-input
  • CD4072 Dual 4-input

7432 Quad 2-input Logic OR Gate

7432 logic or gate

In the next tutorial about Digital Logic Gates, we will look at the digital logic NOT Gatefunction as used in both TTL and CMOS logic circuits as well as its Boolean Algebra definition and truth table.


Logic NOT Gate 

The digital Logic NOT Gate is the most basic of all the logical gates and is sometimes referred to as an Inverting Buffer or simply a Digital Inverter.

                                                         
                                                                       

It is a single input device which has an output level that is normally at logic level “1” and goes “LOW” to a logic level “0” when its single input is at logic level “1”, in other words it “inverts” (complements) its input signal. The output from a NOT gate only returns “HIGH” again when its input is at logic level “0” giving us the Boolean expression of:  A = Q.
Then we can define the operation of a single input digital logic NOT gate as being:
 
“If A is NOT true, then Q is true”

Transistor NOT Gate

A simple 2-input logic NOT gate can be constructed using a RTL Resistor-transistor switches as shown below with the input connected directly to the transistor base. The transistor must be saturated “ON” for an inverted output “OFF” at Q.
transistor not gate
 
Logic NOT Gates are available using digital circuits to produce the desired logical function. The standard NOT gate is given a symbol whose shape is of a triangle pointing to the right with a circle at its end. This circle is known as an “inversion bubble” and is used in NOT, NAND and NOR symbols at their output to represent the logical operation of the NOT function. This bubble denotes a signal inversion (complementation) of the signal and can be present on either or both the output and/or the input terminals.

The Logic NOT Gate Truth Table

SymbolTruth Table
logic not gate
Inverter or NOT Gate
AQ
01
10
Boolean Expression Q = not A or ARead as inverse of A gives Q
 
Logic NOT gates provide the complement of their input signal and are so called because when their input signal is “HIGH” their output state will NOT be “HIGH”. Likewise, when their input signal is “LOW” their output state will NOT be “LOW”. As they are single input devices, logic NOT gates are not normally classed as “decision” making devices or even as a gate, such as the AND or OR gates which have two or more logic inputs. Commercial available NOT gates IC’s are available in either 4 or 6 individual gates within a single IC package.
The “bubble” (o) present at the end of the NOT gate symbol above denotes a signal inversion (complementation) of the output signal. But this bubble can also be present at the gates input to indicate an active-LOW input. This inversion of the input signal is not restricted to the NOT gate only but can be used on any digital circuit or gate as shown with the operation of inversion being exactly the same whether on the input or output terminal. The easiest way is to think of the bubble as simply an inverter.

Signal Inversion using Active-low input Bubble

signal inversion using not gate
Bubble Notation for Input Inversion

NAND and NOR Gate Equivalents

An Inverter or logic NOT gate can also be made using standard NAND and NOR gates by connecting together ALL their inputs to a common input signal for example.
inverter using nand gate
 
A very simple inverter can also be made using just a single stage transistor switching circuit as shown.
transistor inverter
When the transistors base input at “A” is high, the transistor conducts and collector current flows producing a voltage drop across the resistor R thereby connecting the output point at “Q” to ground thus resulting in a zero voltage output at “Q”.
Likewise, when the transistors base input at “A” is low (0v), the transistor now switches “OFF” and no collector current flows through the resistor resulting in an output voltage at “Q” high at a value near to +Vcc.
Then, with an input voltage at “A” HIGH, the output at “Q” will be LOW and an input voltage at “A” LOW the resulting output voltage at “Q” is HIGH producing the complement or inversion of the input signal.

Hex Schmitt Inverters

A standard Inverter or Logic NOT Gate, is usually made up from transistor switching circuits that do not switch from one state to the next instantly, there will always be some delay in the switching action.
Also as a transistor is a basic current amplifier, it can also operate in a linear mode and any small variation to its input level will cause a variation to its output level or may even switch “ON” and “OFF” several times if there is any noise present in the circuit. One way to overcome these problems is to use a Schmitt Inverter or Hex Inverter.
We know from the previous pages that all digital gates use only two logic voltage states and that these are generally referred to as Logic “1” and Logic “0” any TTL voltage input between 2.0v and 5v is recognised as a logic “1” and any voltage input below 0.8v is recognised as a logic “0” respectively.
A Schmitt Inverter is designed to operate or switch state when its input signal goes above an “Upper Threshold Voltage” or UTV limit in which case the output changes and goes “LOW”, and will remain in that state until the input signal falls below the “Lower Threshold Voltage” or LTV level in which case the output signal goes “HIGH”. In other words a Schmitt Inverter has some form of Hysteresis built into its switching circuit.
schmitt trigger inverter
This switching action between an upper and lower threshold limit provides a much cleaner and faster “ON/OFF” switching output signal and makes the Schmitt inverter ideal for switching any slow-rising or slow-falling input signal and as such we can use a Schmitt trigger to convert these analogue signals into digital signals as shown.

Schmitt Inverter

schmitt inverter
 
A very useful application of Schmitt inverters is when they are used as oscillators or sine-to-square wave converters for use as square wave clock signals.

Schmitt NOT Gate Inverter Oscillator

schmitt not gate oscillator
 
The first circuit shows a very simple low power RC type oscillator using a Schmitt inverter to generate a square wave output waveform. Initially the capacitor C is fully discharged so the input to the inverter is “LOW” resulting in an inverted output which is “HIGH”. As the output from the inverter is fed back to its input and the capacitor via the resistor R the capacitor begins to charge up.
When the capacitors charging voltage reaches the upper threshold limit of the inverter, the inverter changes state, the output becomes “LOW” and the capacitor begins to discharge through the resistor until it reaches the lower threshold level were the inverter changes state again. This switching back and forth by the inverter produces a square wave output signal with a 33% duty cycle and whose frequency is given as: ƒ = 680/RC.
The second circuit converts a sine wave input (or any oscillating input for that matter) into a square wave output. The input to the inverter is connected to the junction of the potential divider network which is used to set the quiescent point of the circuit. The input capacitor blocks any DC component present in the input signal only allowing the sine wave signal to pass.
As this signal passes the upper and lower threshold points of the inverter the output also changes from “HIGH” to “LOW” and so on producing a square wave output waveform. This circuit produces an output pulse on the positive rising edge of the input waveform, but by connecting a second Schmitt inverter to the output of the first, the basic circuit can be modified to produce an output pulse on the negative falling edge of the input signal.
Commonly available logic NOT gate and Inverter IC’s include:
TTL Logic NOT Gates
  • 74LS04 Hex Inverting NOT Gate
  • 74LS14 Hex Schmitt Inverting NOT Gate
  • 74LS1004 Hex Inverting Drivers
CMOS Logic NOT Gates
  • CD4009 Hex Inverting NOT Gate
  • CD4069 Hex Inverting NOT Gate

7404 NOT Gate or Inverter

7404 logic not gate
In the next tutorial about Digital Logic Gates, we will look at the digital logic NAND Gatefunction as used in both TTL and CMOS logic circuits as well as its Boolean Algebra definition and truth tables.



Logic NAND Gate 

The Logic NAND Gate is a combination of the digital logic AND gate with that of an inverter or NOT gate connected together in series



                                                           






The NAND (Not – AND) gate has an output that is normally at logic level “1” and only goes “LOW” to logic level “0” when ALL of its inputs are at logic level “1”. The Logic NAND Gate is the reverse or “Complementary” form of the AND gate we have seen previously.

Logic NAND Gate Equivalence

logic nand gate
 
The logic or Boolean expression given for a logic NAND gate is that for Logical Addition, which is the opposite to the AND gate, and which it performs on the complements of the inputs. The Boolean expression for a logic NAND gate is denoted by a single dot or full stop symbol, ( . ) with a line or Overline, ( ‾‾ ) over the expression to signify the NOTor logical negation of the NAND gate giving us the Boolean expression of:  A.B = Q.
Then we can define the operation of a 2-input digital logic NAND gate as being:
 
“If either A or B are NOT true, then Q is true”

Transistor NAND Gate

A simple 2-input logic NAND gate can be constructed using RTL Resistor-transistor switches connected together as shown below with the inputs connected directly to the transistor bases. Either transistor must be cut-off “OFF” for an output at Q.
 
2-input transistor nand gate
 
Logic NAND Gates are available using digital circuits to produce the desired logical function and is given a symbol whose shape is that of a standard AND gate with a circle, sometimes called an “inversion bubble” at its output to represent the NOT gate symbol with the logical operation of the NAND gate given as.

The Digital Logic “NAND” Gate

2-input Logic NAND Gate

SymbolTruth Table
2-input logic NAND gate
2-input NAND Gate
BAQ
001
011
101
110
Boolean Expression Q = A.BRead as A AND B gives NOT Q

3-input Logic NAND Gate

SymbolTruth Table
3-input logic NAND gate
3-input NAND Gate
CBAQ
0001
0011
0101
0111
1001
1011
1101
1110
Boolean Expression Q = A.B.CRead as A AND B AND C gives NOT Q
As with the AND function seen previously, the NAND function can also have any number of individual inputs and commercial available NAND Gate IC’s are available in standard 2, 3, or 4 input types. If additional inputs are required, then the standard NAND gates can be cascaded together to provide more inputs for example.

A 4-input NAND Function

4-input nand function
 
The Boolean Expression for this 4-input logic NAND gate will therefore be:   Q = A.B.C.D
If the number of inputs required is an odd number of inputs any “unused” inputs can be held HIGH by connecting them directly to the power supply using suitable “Pull-up” resistors.
The Logic NAND Gate function is sometimes known as the Sheffer Stroke Function and is denoted by a vertical bar or upwards arrow operator, for example, A NAND B = A|B or A↑B.

The “Universal” NAND Gate

The Logic NAND Gate is generally classed as a “Universal” gate because it is one of the most commonly used logic gate types. NAND gates can also be used to produce any other type of logic gate function, and in practice the NAND gate forms the basis of most practical logic circuits.
By connecting them together in various combinations the three basic gate types of AND, OR and NOT function can be formed using only NAND‘s, for example.

Various Logic Gates using only NAND Gates

digital logic gates using nand gates
 
As well as the three common types above, Ex-Or, Ex-Nor and standard NOR gates can be formed using just individual NAND gates.
Commonly available digital logic NAND gate IC’s include:
TTL Logic NAND Gates
  • 74LS00 Quad 2-input
  • 74LS10 Triple 3-input
  • 74LS20 Dual 4-input
  • 74LS30 Single 8-input
CMOS Logic NAND Gates
  • CD4011 Quad 2-input
  • CD4023 Triple 3-input
  • CD4012 Dual 4-input

7400 Quad 2-input Logic NAND Gate

7400 logic nand gate
 
In the next tutorial about Digital Logic Gates, we will look at the digital logic NOR Gatefunction as used in both TTL and CMOS logic circuits as well as its Boolean Algebra definition and truth tables.



Logic NOR Gate 

The Logic NOR Gate or Inclusive-NOR gate is a combination of the digital logic OR gate with that of an inverter or NOT gate connected together in series.

                                                                
                                                             

The NOR (Not – OR) gate has an output that is normally at logic level “1” and only goes “LOW” to logic level “0” when ANY of its inputs are at logic level “1”. The Logic NOR Gate is the reverse or “Complementary” form of the OR gate we have seen previously.

Logic NOR Gate Equivalent

2-input nor gate equivalent
 
The logic or Boolean expression given for a logic NOR gate is that for Logical Multiplication which it performs on the complements of the inputs. The Boolean expression for a logic NOR gate is denoted by a plus sign, ( + ) with a line or Overline, ( ‾‾ ) over the expression to signify the NOT or logical negation of the NOR gate giving us the Boolean expression of:  A+B = Q.
Then we can define the operation of a 2-input digital logic NOR gate as being:
 
“If both A and B are NOT true, then Q is true”

Transistor NOR Gate

A simple 2-input logic NOR gate can be constructed using RTL Resistor-transistor switches connected together as shown below with the inputs connected directly to the transistor bases. Both transistors must be cut-off “OFF” for an output at Q.
2-input transistor nor gate
 
Logic NOR Gates are available using digital circuits to produce the desired logical function and is given a symbol whose shape is that of a standard OR gate with a circle, sometimes called an “inversion bubble” at its output to represent the NOT gate symbol with the logical operation of the NOR gate given as.

The Digital Logic “NOR” Gate

2-input NOR Gate

SymbolTruth Table
2-input nor gate
2-input NOR Gate
BAQ
001
010
100
110
Boolean Expression Q = A+BRead as A OR B gives NOT Q

3-input NOR Gate

SymbolTruth Table
3-input nor gate
3-input NOR Gate
CBAQ
0001
0010
0100
0110
1000
1010
1100
1110
Boolean Expression Q = A+B+CRead as A OR B OR C gives NOT Q
As with the OR function, the NOR function can also have any number of individual inputs and commercial available NOR Gate IC’s are available in standard 2, 3, or 4 input types. If additional inputs are required, then the standard NOR gates can be cascaded together to provide more inputs for example.

A 4-input NOR Function

4-input nor gate
 
The Boolean Expression for this 4-input NOR gate will therefore be:   Q = A+B+C+D
If the number of inputs required is an odd number of inputs any “unused” inputs can be held LOW by connecting them directly to ground using suitable “Pull-down” resistors.
The Logic NOR Gate function is sometimes known as the Pierce Function and is denoted by a downwards arrow operator as shown, A↓B.

The “Universal” NOR Gate

Like the NAND gate seen in the last section, the NOR gate can also be classed as a “Universal” type gate. NOR gates can be used to produce any other type of logic gate function just like the NAND gate and by connecting them together in various combinations the three basic gate types of AND, OR and NOT function can be formed using only NOR‘s, for example.

Various Logic Gates using only NOR Gates

logic gates using nor gates
 
As well as the three common types above, Ex-Or, Ex-Nor and standard NOR gates can also be formed using just individual NOR gates.
Commonly available digital logic NOR gate IC’s include:
TTL Logic NOR Gates
  • 74LS02 Quad 2-input
  • 74LS27 Triple 3-input
  • 74LS260 Dual 4-input
CMOS Logic NOR Gates
  • CD4001 Quad 2-input
  • CD4025 Triple 3-input
  • CD4002 Dual 4-input

7402 Quad 2-input NOR Gate

7402 logic nor gate
 
In the next tutorial about Digital Logic Gates, we will look at the digital logic Exclusive-OR gate known commonly as the Ex-OR Gate function as used in both TTL and CMOS logic circuits as well as its Boolean Algebra definition and truth tables.


Exclusive-OR Gate 

The Exclusive-OR logic function is a very useful circuit that can be used in many different types of computational circuits.

                                                               


                                                    

In the previous tutorials, we saw that by using the three principal gates, AND Gate, the OR Gate and the NOT Gate, we can build many other types of logic gate functions, such as a NAND Gate and a NOR Gate or any other type of digital logic function we can imagine.
But there are two other types of digital logic gates which although they are not a basic gate in their own right as they are constructed by combining together other logic gates, their output Boolean function is important enough to be considered as complete logic gates. These two “hybrid” logic gates are called the Exclusive-OR (Ex-OR) Gate and its complement the Exclusive-NOR (Ex-NOR) Gate.
Previously, we saw that for a 2-input OR gate, if A = “1”, OR B = “1”, OR BOTH A + B = “1” then the output from the digital gate must also be at a logic level “1” and because of this, this type of logic gate is known as an Inclusive-OR function. The gate gets its name from the fact that it includes the case of Q = “1” when both A and B = “1”.
If however, an logic output “1” is obtained when ONLY A = “1” or when ONLY B = “1”but NOT both together at the same time, giving the binary inputs of “01” or “10”, then the output will be “1”. This type of gate is known as an Exclusive-OR function or more commonly an Ex-Or function for short. This is because its boolean expression excludesthe “OR BOTH” case of Q = “1” when both A and B = “1”.
In other words the output of an Exclusive-OR gate ONLY goes “HIGH” when its two input terminals are at “DIFFERENT” logic levels with respect to each other.
An odd number of logic “1’s” on its inputs gives a logic “1” at the output. These two inputs can be at logic level “1” or at logic level “0” giving us the Boolean expression of:  Q = (A     B) = A.B + A.B
The Exclusive-OR Gate function, or Ex-OR for short, is achieved by combining standard logic gates together to form more complex gate functions that are used extensively in building arithmetic logic circuits, computational logic comparators and error detection circuits.
The two-input “Exclusive-OR” gate is basically a modulo two adder, since it gives the sum of two binary numbers and as a result are more complex in design than other basic types of logic gate. The truth table, logic symbol and implementation of a 2-input Exclusive-OR gate is shown below.

The Digital Logic “Exclusive-OR” Gate

2-input Ex-OR Gate

SymbolTruth Table
2-input exclusive-or gate
2-input Ex-OR Gate
BAQ
000
011
101
110
Boolean Expression Q = A       BA OR B but NOT BOTH gives Q
 
Giving the Boolean expression of:  Q = AB + AB
The truth table above shows that the output of an Exclusive-OR gate ONLY goes “HIGH” when both of its two input terminals are at “DIFFERENT” logic levels with respect to each other. If these two inputs, A and B are both at logic level “1” or both at logic level “0” the output is a “0” making the gate an “odd but not the even gate”. In other words, the output is “1” when there are an odd number of 1’s in the inputs.
This ability of the Exclusive-OR gate to compare two logic levels and produce an output value dependent upon the input condition is very useful in computational logic circuits as it gives us the following Boolean expression of:
Q = (A     B) = A.B + A.B
The logic function implemented by a 2-input Ex-OR is given as either: “A OR B but NOT both” will give an output at Q. In general, an Ex-OR gate will give an output value of logic “1” ONLY when there are an ODD number of 1’s on the inputs to the gate, if the two numbers are equal, the output is “0”.
Then an Ex-OR function with more than two inputs is called an “odd function” or modulo-2-sum (Mod-2-SUM), not an Ex-OR. This description can be expanded to apply to any number of individual inputs as shown below for a 3-input Ex-OR gate.

3-input Ex-OR Gate

SymbolTruth Table
3-input exclusive-OR gate
3-input Ex-OR Gate
CBAQ
0000
0011
0101
0110
1001
1010
1100
1111
Boolean Expression Q = A       B       C“Any ODD Number of Inputs” gives Q
 
Giving the Boolean expression of:  Q = ABC + ABC + ABC + ABC
The symbol used to denote an Exclusive-OR odd function is slightly different to that for the standard Inclusive-OR Gate. The logic or Boolean expression given for a logic ORgate is that of logical addition which is denoted by a standard plus sign.
The symbol used to describe the Boolean expression for an Exclusive-OR function is a plus sign, ( + ) within a circle ( Ο ). This exclusive-OR symbol also represents the mathematical “direct sum of sub-objects” expression, with the resulting symbol for an Exclusive-OR function being given as: (      ).
We said previously that the Ex-OR function is not a basic logic gate but a combination of different logic gates connected together. Using the 2-input truth table above, we can expand the Ex-OR function to: (A+B).(A.B) which means that we can realise this new expression using the following individual gates.

Ex-OR Gate Equivalent Circuit

exclusive-or gate equivalent
 
One of the main disadvantages of implementing the Ex-OR function above is that it contains three different types logic gates OR, NAND and finally AND within its design. One easier way of producing the Ex-OR function from a single gate is to use our old favourite the NAND gate as shown below.

Ex-OR Function Realisation using NAND gates

exclusive-or gate using NAND gates
 
Exclusive-OR Gates are used mainly to build circuits that perform arithmetic operations and calculations especially Adders and Half-Adders as they can provide a “carry-bit” function or as a controlled inverter, where one input passes the binary data and the other input is supplied with a control signal.
Commonly available digital logic Exclusive-OR gate IC’s include:
TTL Logic Ex-OR Gates
  • 74LS86 Quad 2-input
CMOS Logic Ex-OR Gates
  • CD4030 Quad 2-input

7486 Quad 2-input Exclusive-OR Gate

7486 Ex-OR gate
 
The Exclusive-OR logic function is a very useful circuit that can be used in many different types of computational circuits. Although not a basic logic gate in its own right, its usefulness and versatility has turned it into a standard logical function complete with its own Boolean expression, operator and symbol. The Exclusive-OR Gate is widely available as a standard quad two-input 74LS86 TTL gate or the 4030B CMOS package.
One of its most commonly used applications is as a basic logic comparator which produces a logic “1” output when its two input bits are not equal. Because of this, the exclusive-OR gate has an inequality status being known as an odd function. In order to compare numbers that contain two or more bits, additional exclusive-OR gates are needed with the 74LS85 logic comparator being 4-bits wide.
In the next tutorial about Digital Logic Gates, we will look at the digital logic Exclusive-NOR gate known commonly as the Ex-NOR Gate function as used in both TTL and CMOS logic circuits as well as its Boolean Algebra definition and truth tables.


Exclusive-NOR Gate 

The Exclusive-NOR Gate function or Ex-NOR for short, is a digital logic gate that is the reverse or complementary form of the Exclusive-OR function we look at in the previous tutorial.


                                                                   
Basically the “Exclusive-NOR Gate” is a combination of the Exclusive-OR gate and the NOT gate but has a truth table similar to the standard NOR gate in that it has an output that is normally at logic level “1” and goes “LOW” to logic level “0” when ANY of its inputs are at logic level “1”.
However, an output “1” is only obtained if BOTH of its inputs are at the same logic level, either binary “1” or “0”. For example, “00” or “11”. This input combination would then give us the Boolean expression of:  Q = (A     B) = A.B + A.B
Then the output of a digital logic Exclusive-NOR gate ONLY goes “HIGH” when its two input terminals, A and B are at the “SAME” logic level which can be either at a logic level “1” or at a logic level “0”. In other words, an even number of logic “1’s” on its inputs gives a logic “1” at the output, otherwise is at logic level “0”.
Then this type of gate gives and output “1” when its inputs are “logically equal” or “equivalent” to each other, which is why an Exclusive-NOR gate is sometimes called an Equivalence Gate.
The logic symbol for an Exclusive-NOR gate is simply an Exclusive-OR gate with a circle or “inversion bubble”, ( ο ) at its output to represent the NOT function. Then the Logic Exclusive-NOR Gate is the reverse or “Complementary” form of the Exclusive-OR gate, (   ) we have seen previously.

Ex-NOR Gate Equivalent

exclusive-nor gate
 
The Exclusive-NOR Gate function is achieved by combining standard gates together to form more complex gate functions and an example of a 2-input Exclusive-NOR gate is given below.

The Digital Logic “Ex-NOR” Gate

2-input Ex-NOR Gate

SymbolTruth Table
2-input exclusive-nor gate
2-input Ex-NOR Gate
BAQ
001
010
100
111
Boolean Expression Q = A     BRead if A AND B the SAME gives Q
 
Giving the Boolean expression of:  Q = AB + AB
The logic function implemented by a 2-input Ex-NOR gate is given as “when both A AND B are the SAME” will give an output at Q. In general, an Exclusive-NOR gate will give an output value of logic “1” ONLY when there are an EVEN number of 1’s on the inputs to the gate (the inverse of the Ex-OR gate) except when all its inputs are “LOW”.
Then an Ex-NOR function with more than two inputs is called an “even function” or modulo-2-sum (Mod-2-SUM), not an Ex-NOR. This description can be expanded to apply to any number of individual inputs as shown below for a 3-input Exclusive-NORgate.

3-input Ex-NOR Gate

SymbolTruth Table
3-input exclusive-nor gate
3-input Ex-NOR Gate
CBAQ
0001
0010
0100
0111
1000
1011
1101
1110
Boolean Expression Q = A     B     CRead as “any EVEN number of Inputs” gives Q
 
Giving the Boolean expression of:  Q = ABC + ABC + ABC + ABC
We said previously that the Ex-NOR function is a combination of different basic logic gates Ex-OR and a NOT gate, and by using the 2-input truth table above, we can expand the Ex-NOR function to: Q = A     B = (A.B) + (A.B) which means we can realise this new expression using the following individual gates.

Ex-NOR Gate Equivalent Circuit

exclusive-nor gate equivalent
 
One of the main disadvantages of implementing the Ex-NOR function above is that it contains three different types logic gates the AND, NOT and finally an OR gate within its basic design. One easier way of producing the Ex-NOR function from a single gate type is to use NAND gates as shown below.

Ex-NOR Function Realisation using NAND gates

exclusive-nor gate using nand gates
 
Ex-NOR gates are used mainly in electronic circuits that perform arithmetic operations and data checking such as Adders, Subtractors or Parity Checkers, etc. As the Ex-NORgate gives an output of logic level “1” whenever its two inputs are equal it can be used to compare the magnitude of two binary digits or numbers and so Ex-NOR gates are used in Digital Comparator circuits.
Commonly available digital logic Exclusive-NOR gate IC’s include:
TTL Logic Ex-NOR Gates
  • 74LS266 Quad 2-input
CMOS Logic Ex-NOR Gates
  • CD4077 Quad 2-input

74266 Quad 2-input Ex-NOR Gate

74266 exclusive-nor gate
 
In the next tutorial about Digital Logic Gates, we will look at the digital Tri-state Bufferalso called the non-inverting buffer as used in both TTL and CMOS logic circuits as well as its Boolean Algebra definition and truth table.


Digital Buffer

Digital Buffers can be used to isolate other gates or circuit stages from each other preventing the impedance of one circuit from affecting the impedance of another.

                                                           

In a previous tutorial we looked at the digital Not Gate commonly called an inverter, and we saw that the NOT gates output state is the complement, opposite or inverse of its input signal.
So for example, when the single input to NOT gate is “HIGH”, its output state will NOT be “HIGH”. When its input signal is “LOW” its output state will NOT be “LOW”, in other words it “inverts” its input signal, hence the name “Inverter”.
But sometimes in digital electronic circuits we need to isolate logic gates from each other or have them drive or switch higher than normal loads, such as relays, solenoids and lamps without the need for inversion. One type of single input logic gate that allows us to do just that is called the Digital Buffer.
Unlike the single input, single output inverter or NOT gate such as the TTL 7404 which inverts or complements its input signal on the output, the “Buffer” performs no inversion or decision making capabilities (like logic gates with two or more inputs) but instead produces an output which exactly matches that of its input. In other words, a digital buffer does nothing as its output state equals its input state.
Then digital buffers can be regarded as Idempotent gates applying Boole’s Idempotent Law because when an input passes through this device its value is not changed. So the digital buffer is a “non-inverting” device and will therefore give us the Boolean expression of:  Q = A.
Then we can define the logical operation of a single input digital buffer as being:
“Q is true, only when A is true”
In other words, the output ( Q ) state of a buffer is only true (logic “1”) when its input Ais true, otherwise its output is false (logic “0”).
Related Products: Zero Delay Buffer

The Single Input Digital Buffer

SymbolTruth Table
digital buffer
The Digital Buffer
AQ
00
11
Boolean Expression Q = ARead as: A gives Q
The Digital Buffer can also be made by connecting together two NOT gates as shown below. The first will “invert” the input signal A and the second will “re-invert” it back to its original level performing a double inversion of the input.

Double Inversion using NOT Gates

digital buffer using not gates
You may be thinking “what’s the point of a Digital Buffer“? If it does not invert or alter its input signal in any way, or make any logical decisions or operations like the AND or OR gates do, then why not just use a piece of wire instead, and that’s a good point. But a non-inverting Digital Buffer does have many uses in digital electronics with one of its main advantages being that it provides digital amplification.
Digital Buffers can be used to isolate other gates or circuit stages from each other preventing the impedance of one circuit from affecting the impedance of another. A digital buffer can also be used to drive high current loads such as transistor switches because their output drive capability is generally much higher than their input signal requirements. In other words buffers can be used for power amplification of a digital signal as they have what is called a high “fan-out” capability.

Digital Buffer Fan-out Example

digital buffer fan-out
The Fan-out parameter of a buffer (or any digital IC) is the output driving capability or output current capability of a logic gate giving greater power amplification of the input signal. It may be necessary to connect more than just one logic gate to the output of another or to switch a high current load such as an LED, then a Buffer will allow us to do just that.
Generally the output of a logic gate is usually connected to the inputs of other gates. Each input requires a certain amount of current from the gate output to change state, so that each additional gate connection adds to the load of the gate. So the fan-out is the number of parallel loads that can be driven simultaneously by one digital buffer of logic gate. Acting as a current source a buffer can have a high fan-out rating of up to 20 gates of the same logic family.
If a digital buffer has a high fan-out rating (current source) it must also have a high “fan-in” rating (current sink) as well. However, the propagation delay of the gate deteriorates rapidly as a function of fan-in so gates with a fan-in greater than 4 should be avoided.
Then there is a limit to the number of inputs and outputs than can be connected together and in applications where we need to decouple gates from each other, we can use a Tri-state Buffer or tristate output driver.

The “Tri-state Buffer”

As well as the standard Digital Buffer seen above, there is another type of digital buffer circuit whose output can be “electronically” disconnected from its output circuitry when required. This type of Buffer is known as a 3-State Buffer or more commonly a Tri-state Buffer.
A Tri-state Buffer can be thought of as an input controlled switch with an output that can be electronically turned “ON” or “OFF” by means of an external “Control” or “Enable” ( EN ) signal input. This control signal can be either a logic “0” or a logic “1” type signal resulting in the Tri-state Buffer being in one state allowing its output to operate normally producing the required output or in another state were its output is blocked or disconnected.
Then a tri-state buffer requires two inputs. One being the data input and the other being the enable or control input as shown.

Tri-state Buffer Switch Equivalent

tri-state buffer switch
When activated into its third state it disables or turns “OFF” its output producing an open circuit condition that is neither at a logic “High” or “Low”, but instead gives an output state of very high impedance, High-Z, or more commonly Hi-Z. Then this type of device has two logic state inputs, “0” or a “1” but can produce three different output states, “0”, “1” or ” Hi-Z ” which is why it is called a “Tri” or “3-state” device.
Note that this third state is NOT equal to a logic level “0” or “1”, but is an high impedance state in which the buffers output is electrically disconnected from the rest of the circuit. As a result, no current is drawn from the supply.
There are four different types of Tri-state Buffer, one set whose output is enabled or disabled by an “Active-HIGH” control signal producing an inverted or non-inverted output, and another set whose buffer output is controlled by an “Active-LOW” control signal producing an inverted or non-inverted output as shown below.

Active “HIGH” Tri-state Buffer

SymbolTruth Table
tri-state buffer
Tri-state Buffer
EnableINOUT
00Hi-Z
01Hi-Z
100
111
Read as Output = Input if Enable is equal to “1”
An Active-high Tri-state Buffer such as the 74LS241 octal buffer, is activated when a logic level “1” is applied to its “enable” control line and the data passes through from its input to its output. When the enable control line is at logic level “0”, the buffer output is disabled and a high impedance condition, Hi-Z is present on the output.
An active-high tri-state buffer can also have an inverting output as well as its high impedance state creating an active-high tri-state inverting buffer as shown.

Active “HIGH” Inverting Tri-state Buffer

SymbolTruth Table
inverting tri-state buffer
Inverting Tri-state Buffer
EnableINOUT
00Hi-Z
01Hi-Z
101
110
Read as Output = Inverted Input if Enable equals “1”
The output of an active-high inverting tri-state buffer, such as the 74LS240 octal buffer, is activated when a logic level “1” is applied to its “enable” control line. The data at the input is passes through to the output but is inverted producing a complement of the input. When the enable line is LOW at logic level “0”, the buffer output is disabled and at a high impedance condition, Hi-Z.
The same two tri-state buffers can also be implemented with an active-low enable input as shown.

Active “LOW” Tri-state Buffer

SymbolTruth Table
tri-state digital buffer
Tri-state Buffer
EnableINOUT
000
011
10Hi-Z
11Hi-Z
Read as Output = Input if Enable is NOT equal to “1”
An Active-low Tri-state Buffer is the opposite to the above, and is activated when a logic level “0” is applied to its “enable” control line. The data passes through from its input to its output. When the enable control line is at logic level “1”, the buffer output is disabled and a high impedance condition, Hi-Z is present on the output.

Active “LOW” Inverting Tri-state Buffer

SymbolTruth Table
inverting tri-state digital buffer
Inverting Tri-state Buffer
EnableINOUT
001
010
10Hi-Z
11Hi-Z
Read as Output = Inverted Input if Enable is NOT equal to “1”
An Active-low Inverting Tri-state Buffer is the opposite to the above as its output is enabled or disabled when a logic level “0” is applied to its “enable” control line. When a buffer is enabled by a logic “0”, the output is the complement of its input. When the enable control line is at logic level “1”, the buffer output is disabled and a high impedance condition, Hi-Z is present on the output.

Tri-state Buffer Control

We have seen above that a buffer can provide voltage or current amplification within a digital circuit and it can also be used to invert the input signal. We have also seen that digital buffers are available in the tri-state form that allows the output to be effectively switched-off producing a high impedance state (Hi-Z) equivalent to an open circuit.
The Tri-state Buffer is used in many electronic and microprocessor circuits as they allow multiple logic devices to be connected to the same wire or bus without damage or loss of data. For example, suppose we have a data line or data bus with some memory, peripherals, I/O or a CPU connected to it. Each of these devices is capable of sending or receiving data to each other onto this single data bus at the same time creating what is called a contention.
Contention occurs when multiple devices are connected together because some want to drive their output high and some low. If these devices start to send or receive data at the same time a short circuit may occur when one device outputs to the bus a logic “1”, the supply voltage, while another is set at logic level “0” or ground, resulting in a short circuit condition and possibly damage to the devices as well as loss of data.
Digital information is sent over these data buses or data highways either serially, one bit at a time, or it may be up to eight (or more) wires together in a parallel form such as in a microprocessor data bus allowing multiple tri-state buffers to be connected to the same data highway without damage or loss of data as shown.

Tri-state Buffer Data Bus Control

tri-state buffer data bus control
Then, the Tri-state Buffer can be used to isolate devices and circuits from the data bus and one another. If the outputs of several Tri-state Buffers are electrically connected together Decoders are used to allow only one set of Tri-state Buffers to be active at any one time while the other devices are in their high impedance state. An example of Tri-state Buffers connected to a 4-wire data bus is shown below.

Tri-state Buffer Control

tri-state buffer control
This basic example shows how a binary decoder can be used to control a number of tri-state buffers either individually or together in data sets. The decoder selects the appropriate output that corresponds to its binary input allowing only one set of data to pass either a logic “1” or logic “0” output state onto the bus. At this time all the other tri-state outputs connected to the same bus lines are disabled by being placed in their high impedance Hi-Z state.
Then data from data set “A” can only be transferred to the common bus when an active HIGH signal is applied to the tri-state buffers via the Enable line, ENA. At all other times it represents a high impedance condition effectively being isolated from the data bus.
Likewise, data set “B” only passes data to the bus when an enable signal is applied via ENB. A good example of tri-state buffers connected together to control data sets is the TTL 74244 Octal Buffer.
It is also possible to connect Tri-state Buffers “back-to-back” to produce what is called a Bi-directional Buffer circuit with one “active-high buffer” connected in parallel but in reverse with one “active-low buffer”.
Here, the “enable” control input acts more like a directional control signal causing the data to be both read “from” and transmitted “to” the same data bus wire. In this type of application a tri-state buffer with bi-directional switching capability such as the TTL 74245 can be used.
We have seen that a Tri-state buffer is a non-inverting device which gives an output (which is same as its input) only when the input to the Enable, ( EN ) pin is HIGH otherwise the output of the buffer goes into its high impedance, ( Hi-Z ) state. Tri-state outputs are used in many integrated circuits and digital systems and not just in digital tristate buffers.
Both digital buffers and tri-state buffers can be used to provide voltage or current amplification driving much high loads such as relays, lamps or power transistors than with conventional logic gates. But a buffer can also be used to provide electrical isolation between two or more circuits.
We have seen that a data bus can be created if several tristate devices are connected together and as long as only one is selected at any one time, there is no problem. Tri-state buses allow several digital devices to input and output data on the same data bus by using I/O signals and address decoding.
Tri-state Buffers are available in integrated form as quad, hex or octal buffer/drivers in both uni-directional and bi-directional forms, with the more common being the TTL 74240, the TTL 74244 and the TTL 74245 as shown.
Commonly available Digital Buffer and Tri-state Buffer IC’s include:
TTL Logic Digital Buffers
  • 74LS07 Hex Non-inverting Buffer
  • 74LS17 Hex Buffer/Driver
  • 74LS244 Octal Buffer/Line Driver
  • 74LS245 Octal Bi-directional Buffer
CMOS Logic Digital Buffers
  • CD4050 Hex Non-inverting Buffer
  • CD4503 Hex Tri-state Buffer
  • HEF40244 Tri-state Octal Buffer

74LS07 Digital Buffer

7407 digital buffer

74LS244 Octal Tri-state Buffer

74244 tri-state buffer


Digital Logic Gates Summary

In this section about Digital Logic Gates, we have seen that there are three main basic types of digital logic gate, the AND Gate, the OR Gate and the NOT Gate.


                                       




We have also seen that each gate has an opposite or complementary form of itself in the form of the NAND Gate, the NOR Gate and the Buffer respectively, and that any of these individual gates can be connected together to form more complex Combinational Logiccircuits.
We have also seen, that in digital electronics both the NAND gate and the NOR gate can both be classed as “Universal” gates as they can be used to construct any other gate type. In fact, any combinational circuit can be constructed using only two or three input NAND or NOR gates. We also saw that NOT gates and Buffers are single input devices that can also have a Tri-state High-impedance output which can be used to control the flow of data onto a common data bus wire.
Digital Logic Gates can be made from discrete components such as Resistors, Transistors and Diodes to form RTL (resistor-transistor logic) or DTL (diode-transistor logic) circuits, but today’s modern digital 74xxx series integrated circuits are manufactured using TTL (transistor-transistor logic) based on NPN bipolar transistor technology or the much faster and low power CMOS based MOSFET transistor logic used in the 74Cxxx, 74HCxxx, 74ACxxx and the 4000 series logic chips.
The eight most “standard” individual Digital Logic Gates are summarised below along with their corresponding truth tables.

Standard Logic Gates

The Logic AND Gate

SymbolTruth Table
2-input logic AND gate
2-input AND Digital Logic Gate
BAQ
000
010
100
111
Boolean Expression Q = A.BRead as A AND B gives Q

The Logic OR Gate

SymbolTruth Table
2-input or digital logic gatesBAQ
000
011
101
111
Boolean Expression Q = A + BRead as A OR B gives Q

Inverting Logic Gates

The Logic NAND Gate

SymbolTruth Table
2-input nand digital logic gatesBAQ
001
011
101
110
Boolean Expression Q = A . BRead as A AND B gives NOT Q

The Logic NOR Gate

SymbolTruth Table
2-input nor digital logic gatesBAQ
001
010
100
110
Boolean Expression Q = A + BRead as A OR B gives NOT Q

Exclusive Logic Gates

The Logic Exclusive-OR Gate (Ex-OR)

SymbolTruth Table
exclusive-or gateBAQ
000
011
101
110
Boolean Expression Q = A     BRead as A OR B but not BOTH gives Q (odd)

The Logic Exclusive-NOR Gate (Ex-NOR)

SymbolTruth Table
exclusive-nor gateBAQ
001
010
100
111
Boolean Expression Q = A     BRead if A AND B the SAME gives Q (even)

Single Input Logic Gates

The Hex Buffer

SymbolTruth Table
digital logic gate bufferAQ
00
11
Boolean Expression Q = ARead as A gives Q

The NOT gate (Inverter)

SymbolTruth Table
digital logic gateAQ
01
10
Boolean Expression Q = not A or ARead as inverse of
A gives Q
The operation of the above Digital Logic Gates and their Boolean expressions can be summarised into a single truth table as shown below. This truth table shows the relationship between each output of the main digital logic gates for each possible input combination.

Digital Logic Gate Truth Table Summary

The following logic gates truth table compares the logical functions of the 2-input logic gates detailed above.
InputsTruth Table Outputs For Each Gate
BAANDNANDORNOREX-OREX-NOR
00010101
01011010
10011010
11101001
 
Truth Table Output for Single-input Gates
ANOTBuffer
010
101

Pull-up and Pull-down Resistors

One final point to remember, when connecting together digital logic gates to produce logic circuits, any “unused” inputs to the gates must be connected directly to either a logic level “1” or a logic level “0” by means of a suitable “Pull-up” or “Pull-down” resistor ( for example 1kΩ resistor ) to produce a fixed logic signal. This will prevent the unused input to the gate from “floating” about and producing false switching of the gate and circuit.
pull up and pull down resistors
As well as using pull-up or pull-down resistors to prevent unused logic gates from floating about, spare inputs to gates and latches can also be connected together or connected to left-over or spare gates within a single IC package as shown.
unused logic gates inputs

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